The present invention relates to a method for fabricating a semiconductor device and, more particularly, to a method for forming a pattern in a semiconductor device.
When gate patterns are formed, critical dimensions (CDs) of the gate patterns in a peripheral region affect an electric characteristic of a semiconductor device. Therefore, adjusting the CDs of the gate patterns in the peripheral region according to the characteristics of the semiconductor device is generally necessary.
However, because of a difference in the pattern density between a peripheral region and a cell region, a loading effect arises. Thus, the gate patterns in the peripheral region are formed with larger CDs than the CDs of the gate patterns in the cell region. Accordingly, although the CDs of the gate patterns in the peripheral region need to be decreased by reducing CDs of mask patterns, reducing the CDs of the mask patterns may be limited because, as devices are minimized, the mask patterns are likely to collapse.